In high-speed serial links, decision feedback equalization (DFE) may be used to compensate for inter-symbol interference that may result from transmitting serial data through a channel with a non-ideal (e.g., frequency-dependent) frequency response. DFE may, however, be prone to burst errors: because DFE uses previously detected bits to cancel inter-symbol interference, if previously detected bits are in error, “interference subtraction” becomes “interference addition”. To mitigate burst errors, a system may rely on interleaving, which may spread the burst of errors (i.e., a series of consecutive erroneous bits) to singular errors (errors in individual bits adjacent to correct bits), which can be corrected using error correcting codes. The size of the interleaver, i.e., the interleaver block length, may be larger than the length of burst times the block size of the error correcting code; an interleaver of this size may require significant amounts of memory to be able to accommodate burst errors of medium length, resulting in high cost. Thus, there is a need for a system for burst-error correction capable of operating without employing a large interleaver.